PD IEC TR 61189-5-506:2019

PD IEC TR 61189-5-506:2019

July 2019
Standard Current

Test methods for electrical materials, printed boards and other interconnection structures and assemblies - General test methods for materials and assemblies. An intercomparison evaluation to implement the use of fine-pitch test structures for surface insulation resistance (SIR) testing of solder fluxes in accordance with IEC 61189-5-501

Main informations

Collections

BSI English standards

Publication date

July 2019

Number of pages

26 p.

Reference

PD IEC TR 61189-5-506:2019

ICS Codes

31.180   Printed circuits and boards

Print number

1

International kinship

IEC/TR 61189-5-506 ED.1.0
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